Field of the Invention
The present invention relates to an n-channel double diffusion MOS (Metal Oxide Semiconductor) transistor, and a semiconductor composite device including the same.
Description of Related Art
US2010/0051946A1 discloses a BiCDMOS (Bipolar CMOS DMOS) device which is a semiconductor composite device including a bipolar element, a CMOS (Complementary MOS) transistor and a DMOS (Double Diffusion MOS) transistor provided on a common semiconductor substrate. An n-channel DMOS transistor generally has an n-type well provided on a p-type semiconductor substrate with the intervention of an n-type buried layer. In a surface portion of the n-type well, a p-type body layer and an n-type drift layer are provided in spaced relation, and a channel region is defined between the p-type body layer and the n-type drift layer. An n-type source layer is provided in the p-type body layer. In the n-type well, an n-type drain layer is provided in contact with the n-type drift layer. A gate electrode is provided in opposed relation to the channel region with the intervention of a gate insulation film.
With this arrangement, however, the n-type buried layer and the n-type drain layer are connected to the same node, so that a great capacitance present between the n-type buried layer and the p-type semiconductor substrate exerts a non-negligible influence on the through-rate. This makes it difficult to provide excellent switching characteristics. Since the p-type body layer is surrounded by the n-type well, a depletion layer cannot sufficiently laterally spread, making it impossible to reduce the ON resistance.